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| TM HS-3182 ARINC 429 Bus Interface Line Driver Circuit Description The HS-3182 is a monolithic dielectrically isolated bipolar differential line driver designed to meet the specifications of ARINC 429. This Device is intended to be used with a companion chip, HS-3282 CMOS ARINC Bus Interface Circuit, which provides the data formatting and processor interface function. All logic inputs are TTL and CMOS compatible. In addition to the DATA (A) and DATA (B) inputs, there are also inputs for CLOCK and SYNC signals which are AND'd with the DATA inputs. This feature enhances system performance and allows the HS-3182 to be used with devices other than the HS-3182. Three power supplies are necessary to operate the HS-3182: +V = +15V 10%, -V = -15V 10%, and V 1 = 5V 5%. VREF is used to program the differential output voltage swing such that VOUT (DIFF) = 2VREF . Typically, VREF = V1 = 5V 5%, but a separate power supply may be used for VREF which should not exceed 6V. The driver output impedance is 75 20% at 25oC. Driver output rise and fall times are independently programmed through the use of two external capacitors connected to the CA and CB inputs. Typical capacitor values are C A = CB = 75pF for high-speed operation (100KBPS), and CA = CB = 300pF for low-speed operation (12 to 14.5KBPS). The outputs are protected against over-voltage and short circuit as shown in the Block Diagram. The HS-3182 is designed to operate with a case temperature range of -55oC to +125oC, or 0oC to +70oC. March 1997 Features * TTL and CMOS Compatible Inputs * Adjustable Rise and Fall Times via Two External Capacitors * Programmable Output Differential Voltage via VREF Input * Operates at Data Rates Up to 100 Kilobits/Sec * Output Short Circuit Proof and Contains Over-Voltage Protection * Outputs are Inhibited (0 Volts) If DATA (A) and DATA (B) Inputs are Both in the "Logic One" State * DATA (A) and DATA (B) Signals are "AND'd" with Clock and Sync Signals * Full Military Temperature Range Ordering Information PACKAGE SBDIP TEMPERATURE RANGE -40oC to +85oC -55oC to +125oC SMD# CLCC SMD# -55oC to +125oC -55oC to +125oC -55oC to +125oC PART NUMBER HS1-3182-9+ HS1-3182-8 5962-8687901EA HS4-3182-8 5962-86879013A PKG. NO D16.3 D16.3 D16.3 J28.A J28.A Pinouts HS-3182 (SBDIP) TOP VIEW SYNC VREF 1 GND 2 SYNC 3 DATA (A) 4 CA 5 AOUT 6 -V 7 GND 8 16 V1 15 NC 14 CLK 13 DATA (B) 12 CB 11 BOUT 10 NC 9 +V NC DATA (A) NC NC CA 5 6 7 8 9 HS-3182 (CLCC) TOP VIEW VREF GND NC NC NC 25 CLK 24 NC 23 DATA (B) 22 CB 21 NC 20 NC 19 NC 12 13 14 15 16 17 18 AOUT GND NC BOUT NC -V +V 4 3 2 1 NC 10 TRUTH TABLE SYNC CLK DATA (A) DATA (B) AOUT X L H H H H L X H H H H X X L L H H X X L H L H 0V 0V 0V BOUT 0V 0V 0V COMMENTS Null Null Null Low High Null NC 11 -VREF +VREF +VREF -VREF 0V 0V V1 28 27 26 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 178 FN2963.1 HS-3182 Block Diagram (9) (5) +V CA OUTPUT DRIVER (A) ROUT/2 (4) DATA (A) LEVEL SHIFTER AND SLOPE CONTROL (A) FA (6) AOUT (14) CLOCK (1) VREF (3) SYNC (13) DATA (B) LEVEL SHIFTER AND SLOPE CONTROL (B) OUTPUT DRIVER ROUT/2 (B) FB BOUT (11) (8) GND CL RL (16) V1 (2) CURRENT REGULATOR -V (7) CB (12) OVER-VOLTAGE PROTECTION Typical Application (9) PIN NUMBERS INDICATED BY ( ) (16) (14) (3) +5V (1) (5) CA CA (12) CB CB +V AOUT HS-3182 ARINC DRIVER CIRCUIT 31 429D0 HS-3282 CMOS ARINC CIRCUIT 429D0 (4) DATA (A) 32 (13) DATA (B) 16 LEAD DIP BOUT TO BUS (SEE NOTE) +15V V1 VREF CLOCK SYNC GND (2) GND (8) -V (7) PIN NUMBER 10, 15 = NC -15V NOTE: The rise and fall time of the outputs are set to ARINC specified values by CA and CB. Typical CA = CB = 75pF for high speed and 300pF for low speed operation. The output HI and low levels are set to ARINC specifications by VREF. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 179 HS-3182 Absolute Maximum Ratings Voltage Between +V and -V Terminals . . . . . . . . . . . . . . . . . . . 40V V1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Logic Input Voltage. . . . . . . . . . . . . . . . . . . . GND -0.3V to V1 +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . See Note 1 Output Over-Voltage Protection . . . . . . . . . . . . . . . . . . . See Note 2 Thermal Information Thermal Resistance (Typical) JA JC SBDIP Package. . . . . . . . . . . . . . . . . . 75oC/W 18oC/W CLCC Package . . . . . . . . . . . . . . . . . . 60oC/W 14oC/W oC to +150oC Storage Temperature Range . . . . . . . . . . . . . . . . .-65 Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300oC Recommended Operating Conditions Operating Voltage +V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V 10% -V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15V 10% V1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V 5% VREF (For ARINC 429) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V 5% Operating Temperature Range HS-3182-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to +70oC HS-3182-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC NOTES: Die Characteristics Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 1. Heat sink may be required for 100K bits/s at +125oC and output short circuit at +125oC. 2. The fuses used for output over-voltage protection may be blown by a fault at each output of greater than 6.5V relative to GND. CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. DC Electrical Performance Specifications DC PARAMETER Supply Current +V (Operating) Supply Current -V (Operating) Supply Current V1 (Operating) Supply Current VREF (Operating) Logic "1" Input Voltage Logic "0" Input Voltage Output Voltage High (Output to GND) SYMBOL ICCOP (+V) ICCOP (-V) ICCOP (V1) ICCOP (VREF) VIH V IL V OH No Load (0-100K bits/s) (NOTE 1) CONDITIONS No Load (0-100K bits/s) No Load (0-100K bits/s) No Load (0-100K bits/s) No Load (0-100K bits/s) MIN -16 -1.0 2.0 VREF (-250mV) -V REF (-250mV) -250 -20 Short to GND MAX 16 975 0.5 VREF (+250mV) -VREF (+250mV) +250 10 -80 mV A A mA UNITS mA mA A mA V V Output Voltage Low (Output to GND) VOL No Load (0-100K bits/s) Output Voltage Null Input Current (Input Low) Input Current (Input High) Output Short Circuit Current (Output High) Output Short Circuit Current (Output Low) Output Impedance NOTE: VNULL IIL IIH IOHSC No Load (0-100K bits/s) IOLSC Short to GND 80 - mA ZO TA = +25oC 60 90 1. +V = +15V 10%, -V = -15V 10%, V1 = VREF = 5V 5%, unless otherwise specified TA = 0oC to +70oC for HS-3182-5 and TA = -55oC to +125oC for HS-3182-8. 180 HS-3182 AC Electrical Performance Specifications AC PARAMETER Rise Time (AOUT, BOUT) SYMBOL tR (NOTE 1) CONDITIONS CA = CB = 75pF, Note 2 (at TA = -55oC Only) CA = CB = 300pF, Note 2 Fall Time (AOUT, BOUT) tF CA = CB = 75pF, Note 3 (at TA = -55oC Only) CA = CB = 300pF, Note 3 Propagation Delay Input to Output Propagation Delay Input to Output NOTES: 1. +V = +15V, -V = -15V, V1 = VREF = 5V, unless otherwise specified TA = 0oC to +70oC for HS-3182-5 and TA = -55oC to +125oC for HS-3182-8. 2. tR measured 50% to 90% times 2, no load. 3. tF measured 50% to 10% times 2, no load. tPLH tPHL CA = CB = 75pF, No Load CA = CB = 75pF, No Load MIN 1 0.9 3 1 0.9 3 MAX 2 2.4 9 2 2.4 9 3.3 3.3 UNITS S S S S S S S S Electrical Performance Specifications PARAMETER Input Capacitance Supply Current +V (Short Circuit) Supply Current -V (Short Circuit) NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design and after major process and/or design changes affecting these parameters. SYMBOL CIN ISC (+V) ISC (-V) TA = +25oC Short to GND, TA = +25oC Short to GND, TA = +25oC (NOTE 1) CONDITIONS MIN -150 MAX 15 150 UNITS pF mA mA Power Specifications Nominal Power at +25oC, +V = +15V, -V = -15V, V1 = VREF = 5V, Notes 1, 3 DATA RATE (K BITS/s) 0-100 12.5-14 100 NOTES: 1. Heat sink may be required for 100K bits/s at +125oC and output short circuit at +125oC. Thermal characteristics: T(CASE) = T(Junction) - (Junction - Case) P(Dissipation). Where: T(Junction Max) = +175oC (Junction - Case) = 10.9oC/W (6.1oC/W for LCC) (Junction - Ambient) = 73.5oC/W (54.0oC/W for LCC) 2. Full Load for ARINC 429: RL = 400 and CL = 30,000pF in parallel between AOUT and B OUT (see block diagram). 3. Output Over-Voltage Protection: The fuses used for output over-voltage protection may be blown by a fault at each output of greater than 6.5V relative to GND. No Load Full Load, Note 2 Full Load, Note 2 LOAD +V 11mA 24mW 46mW V-10mA -24mW -46mW V1 600A 600A 600A CHIP POWER 325mW 660mW 1 Watt POWER DISSIPATION IN LOAD 0 60mW 325mW 181 HS-3182 Driver Waveforms 50% 5V 0V 5V 0V ADJ. BY CB DATA (A) 0V DATA (B) 0V VREF AOUT 0V 50% +4.75V TO +5.25V ADJ. BY CA tPHL BOUT 0V -VREF 50% 50% tR tPLH 2VREF -VREF VREF -4.75V TO -5.25V +4.75V TO +5.25V -4.75V TO -5.25V HIGH +9.5V TO +10.5V DIFFERENTIAL OUTPUT AOUT - BOUT 0V NULL -2VREF tF LOW NOTE: OUTPUTS UNLOADED -9.5V TO -10.5V NOTES: tR measured 50% to 90% times 2 tF measured 50% to 10% times 2 VIH = 5V VIL = 0V VOL = -4.75V to -5.25V VOH = 4.75V to 5.25V When the Data (A) input is in the Logic One state and the Data (B) input is in the Logic Zero state, AOUT is equal to VREF and BOUT is equal to -VREF . This constitutes the Output High state. Data (A) and Data (B) both in the Logic Zero state causes both AOUT and B OUT to be equal to 0V which designates the output Null state. Data (A) in the Logic Zero state and Data (B) in the Logic One state causes AOUT to be equal to -VREF and BOUT to be equal to V REF which is the Output Low state. Burn-In Schematic V1 DATA (B) +V VIH C3 A 16 1 15 2 14 13 12 11 10 HS-3182 3 4 5 6 7 C2 9 R 8 C1 VIH B -V GND VIL VIL DATA (A) NOTES: R = 400 5% C1 = 0.03F 20% C2 = C3 = 500pF, NPO +V = +15.5V 0.5V -V = -15.5V 0.5V V1 = +5.5V 0.5V A 0.0F decoupling capacitor is required on each of the three supply lines (+V, -V and V1) at every 3rd Burn-In socket. Ambient Temp. Max. = +125oC. Package = 16 Lead Side Brazed DIP. Pulse Conditions = A & B = 6.25kHz 10%. B is delayed one-half cycle and in sync with A. VIH = 2.0V Min. VIL = 0.5V Max. 182 |
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